Prober and tester with contact interface for integrated circuits-containing wafer held docked in a vertical plane
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United States of America Patent
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-
Aug 12, 1997
Grant Date -
N/A
app pub date -
Jul 21, 1995
filing date -
Jul 21, 1995
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A tester for testing integrated circuits-containing semiconductor wafers or substrates, includes a vertically oriented performance board with. D/A converters mounted and pin connected immediately therebehind. A prober including a vertical array of connector pins mounts a vertical probe card and a vertically-mounted chuck on which a vertically-oriented wafer or substrate is held. One of the tester and prober are moved with respect to the other to dock and latch the tester and prober together. Simultaneously the array of connector pins is electrically connected to electrical connectors on the performance board and probe needles extending from a probe board on the probes are placed into test contact with contact pads on the integrated circuits on the wafer or substrate.
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