Reducing programming time of a field programmable gate array employing antifuses
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United States of America Patent
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Aug 26, 1997
Grant Date -
N/A
app pub date -
Oct 10, 1995
filing date -
Oct 10, 1995
priority date (Note) -
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Abstract
Critical programmed reliability of a metal-to-metal amorphous silicon antifuse is a function of programming current, operating current and total programming time. The time required to program a field programmable gate array is reduced by classifying antifuses to be programmed into three or more classes according to the amount of programming time required to achieve critical programmed reliability under programming current and operating current conditions. Each of these classes of antifuses is programmed with near the minimum programming time required to program every antifuse in the class to critical reliability. In this way, large numbers of antifuses are not programmed with significantly greater amounts of programming time than are actually required to program them to critical reliability. The time required to program the field programmable gate array is therefore reduced. Techniques for obtaining critical reliability data used in classifying antifuses are also disclosed. Classifications based on antifuse type, programming method, and operating conditions are also disclosed.
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