Defect isolation using scan-path testing and electron beam probing in multi-level high density asics

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5663967
SERIAL NO

08545462

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A method and apparatus for isolating faults in an integrated circuit reduces time and effort to precisely locate such faults. A fault dictionary is developed, which is a record of the errors a circuit's modeled faults are expected to cause. The fault dictionary need only be generated once, and can be recalled for later testing of the same design. A failing circuit is subjected to test vectors and the erroneous outputs are logged, and then all failing scan test vectors are mapped into simulation scan patterns. Faults in the circuit are localized to a more narrowly defined area in which faults in the circuit may occur. If the area, even after localization, is too large, additional test patterns are developed and the device is subjected to another round of tests. The redefinition of test patterns is repeated until possible fault locations are sufficiently localized. The device is then probed to precisely locate the fault(s).

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
BELL SEMICONDUCTOR LLC401 N MICHIGAN AVE SUITE 1600 CHICAGO IL 60611

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
De, Kaushik San Jose, CA 18 187
Gunda, Arun K Sunnyvale, CA 4 107
Lindberg, Grant A Santa Clara, CA 1 57
Prasad, Sharad Peasanton, CA 2 64

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation