Cache memory containing extra status bits to indicate memory regions where logging of data should occur

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United States of America Patent

PATENT NO 5666514
SERIAL NO

08270655

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Abstract

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The present invention provides a digital computer memory cache organization for efficient data logging, log-based copy and rollback, high-performance I/O, network switching and multi-cache consistency maintenance. The cache organization implements efficient selective cache write-back, mapping and transferring of data. Write or store operations to cache lines tagged as logged are written through to a log block builder associated with the cache. Non-logged store operations are handled local to the cache, as in a writeback cache. The log block builder combines write operations into data blocks and transfers the data blocks to a log splitter. A log splitter demultiplexes the logged data into separate streams based on address.

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Patent Owner(s)

Patent OwnerAddress
BOARD OF TRUSTEES OF THE LELAND STANFORD JUNIOR UNIVERISTY THE1705 EL CAMINO REAL PALO ALTO CA 94306-1106

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cheriton, David R Palo Alto, CA 111 3744

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