Row decoder with level translator
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United States of America Patent
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-
Sep 16, 1997
Grant Date -
N/A
app pub date -
Dec 20, 1994
filing date -
May 21, 1992
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A combined row decoder and level translator powered by an on-chip high voltage supply results in an efficient layout, area savings and elimination of the global precharge signal resulting in additional area and power savings. In addition, power from the high voltage supply is consumed only by the level translator and wordline driver of the selected decoder resulting in additional power savings.
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