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Abstract

A digital communication receiver (10) takes one complex sample (20) of a baseband analog signal (12) per symbol. A rectangular to polar converter (26) separates phase attributes of the complex samples from magnitude attributes. A phase processor (28) identifies clock adjustment opportunities which occur when relatively large phase changes take place between consecutive symbols. A magnitude processor (32) influences symbol timing only during clock adjustment opportunities. The magnitude processor (32) advances symbol timing in a phase locked loop when decreasing magnitude changes are detected during clock adjustment opportunities and retards symbol timing when increasing magnitude changes are detected during clock adjustment opportunities. An interpolator (66) may be used to estimate magnitude values between samples so that magnitude change is determined between sampled magnitude values and estimated magnitude values.

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First Claim