Memory subsystem with disk meshing, controller meshing, and efficient cache buffer lookup

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United States of America Patent

PATENT NO 5671385
SERIAL NO

08235714

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Abstract

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In a data processing system, source block addresses are linearly mapped to virtual linear target disks equal in size to actual physical disks comprised by the long-term storage. Blocks of the virtual linear target disks are then assigned to disk-meshed disks equal in size to the actual physical disks whereby each block within a set of adjacently addressed linear target disk blocks is assigned to a separate disk-meshed disk. Controller meshing may be performed by assigning each disk-meshed disk to a controller-meshed disk which will comprise the actual physical disk, whereby respective sets of blocks within respective disk-meshed disks, all having the same disk controller, are assigned to equal-sized controller-meshed disks located on different disk controllers. Additional mechanisms that may be provided in the data processing system include efficient cache buffer lookup linked lists, and a mechanism for accelerating processing performed by an ancillary processing mechanism by ignoring a delay time.

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Patent Owner(s)

Patent OwnerAddress
SBC TECHNOLOGY RESOURCES INC9505 ARBORETUM BOULEVARD AUSTIN TX 78759

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jost, Larry T St. Louis, MO 3 77

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