Method of forming multi-layer interconnection
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United States of America Patent
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-
Oct 14, 1997
Grant Date -
N/A
app pub date -
Mar 13, 1996
filing date -
Oct 19, 1995
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A method of forming a multi-layer interconnection is provided by which a resist pattern can be precisely formed by maintaining a uniform resist pattern film thickness and such problems as reduced electric resistance of a connecting portion and defective connection between a first interconnection layer and a second interconnection layer will not occur by ensuring a sufficient diameter of a contact hole. The method includes the steps of: removing a portion of an insulating layer having a main surface and covering a first conductive layer to form a hole reaching the first conductive layer in the insulating layer; forming an organic layer at least filling the hole; removing a portion of the insulating layer at a portion at which the insulating layer contacts an organic layer filling the hole; removing the organic layer filling the hole to form a recessed portion continuous to the hole in the insulating layer; and forming a second conductive layer in such a manner that it fills the hole and the recessed portion.
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