A/D converter with charge-redistribution DAC and split summation of main and correcting DAC outputs
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United States of America Patent
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Nov 4, 1997
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N/A
app pub date -
Jun 5, 1995
filing date -
Jun 5, 1995
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Abstract
An analog-to-digital (A/D) converter of the successive-approximation type wherein the digital-to-analog converter (DAC) includes a charge-redistribution, binary-weighted switched-capacitor array for producing the analog output for comparison with the analog input signal. A second switched-capacitor DAC is employed to develop error correction signals to be combined with the analog signal from the A/D conversion DAC. The conversion DAC array is connected to one input terminal of the comparator, and the error-correction DAC array is connected to the other comparator input terminal, an arrangement which reduces the number of capacitors required while providing symmetrical capacitance loading of the comparator input circuit.
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