Local punchthrough stop for ultra large scale integration devices
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United States of America Patent
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Nov 11, 1997
Issued Date -
N/A
app pub date -
May 6, 1996
filing date -
Jul 15, 1994
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The invention relates to an improved MOSFET device structure for use in ultra large scale integration and the method of forming the device structure. A local punchthrough stop region is formed directly under the gate electrode using ion implantation. The local punchthrough stop region reduces the expansion of the depletion region in the channel and thereby increases the punchthrough voltage. The local punchthrough stop region is self-aligned with the gate electrode and source/drain region so that critical spacings are maintained even for sub micron devices. The source and drain junction capacitances are also reduced. The invention can be used in either N channel or P channel MOSFET devices. The invention can be used with a conventional source/drain structure as well as a double doped drain structure and a light doped drain structure.
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