Method and system for verifying execution order within a multiprocessor data processing system
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United States of America Patent
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Nov 25, 1997
Grant Date -
N/A
app pub date -
Mar 16, 1995
filing date -
Mar 16, 1995
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method and system are disclosed for verifying consistency of an instruction execution order of a multiprocessor data processing system with a specified memory consistency model. Each processor within the multiprocessor data processing system executes instructions from an associated one of a number of instruction streams, which include instructions that store a number of unique values from multiple processors to a single selected address within memory. One of the unique values is loaded from the selected address to a particular processor within the data processing system. A set of valid values which may be returned by the loading step is determined according to the specified memory consistency model. By comparing the unique value with members of the set of valid values, the instruction execution order of the multiprocessor data processing system is verified. Utilizing the unique value which was returned by the load instruction, the set of valid values may then be updated.
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