Method and system for measuring antifuse resistance
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United States of America Patent
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Dec 2, 1997
Grant Date -
N/A
app pub date -
Aug 9, 1995
filing date -
Aug 9, 1995
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Abstract
A method and system for measuring programmed antifuse resistance in an FPGA without disturbing the antifuse resistance. The method includes estimating a plurality of subparts of the programming path connecting low and high programming voltage sources on the FPGA device, measuring the path as a whole, and subtracting the sum total of the subparts from the whole path measurement, thereby deriving the antifuse resistance. If the derived antifuse resistance is higher than desired, programming and measurement may be repeated to ensure device longevity and accurate timing for implemented designs.
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