System for prioritizing quiesce requests and recovering from a quiescent state in a multiprocessing system with a milli-mode operation
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United States of America Patent
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Dec 2, 1997
Grant Date -
N/A
app pub date -
Mar 31, 1995
filing date -
Mar 31, 1995
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A milli-mode routine handles a quiesce interrupt, and causes all the processors in the system to enter a quiesced state. A single bit of a millicode control register indicates a quiesced state and drives an output of the processor to indicate the processor is in a quiesced state. The processor receives a signal indicating all processors in the system are in a quiesced state and latches this value. The output of this latch is sent to the processor instruction unit for use as a millicode branch condition.
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