Importance

Loading Importance Indicators...

Abstract

A bus driver includes a plurality of first to m-th buffer circuits for receiving input of an input signal, a delay circuit for delaying the input signal by a predetermined time period, an n-th buffer circuit for receiving input of a delay signal from the delay circuit, a capacitor for selectively receiving input of a predetermined combination of the output signals of the first to m-th buffer circuits, and an output terminal for outputting a signal composed of the output of the capacitor and the output signal of said n-th buffer circuit. As a result of composition of a plurality of signals output from the capacitive portion and the signal output from the n-th buffer circuit, a plurality of output signals each having different rise time and fall time are output from the output terminal.

Loading the Abstract Image...

First Claim