Image compression coprocessor with data flow control and multiple processing units
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United States of America Patent
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Dec 16, 1997
Grant Date -
N/A
app pub date -
Jun 17, 1993
filing date -
Apr 27, 1993
priority date (Note) -
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status (Latency Note)
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Abstract
The present invention provides an image compression/decompression coprocessor which is integrated on a single chip. The control bus has a control unit which is connected by an internal, global bus to a number of different, special purpose processing units. Each of the processing units is specifically designed to handle only certain steps in compression and decompression processes.
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