Output mapping of die pad bonds in a ball grid array

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United States of America Patent

PATENT NO 5703402
SERIAL NO

08559189

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Abstract

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The present invention relates to a substrate for ball-grid arrays. Bond sites are arranged around a die-attach region of the substrate. Signal traces connect the bond sites to vias disposed on the substrate, thus providing an electrical path between both sides of the substrate. Solder balls (solder bumps) are disposed on the other side of the substrate and arranged in a grid-like pattern. The generally linearly-arranged bond sites are sequentially numbered, as is the grid-like arrangement of solder balls. In a preferred embodiment, the bond sites are used only for carrying signals to and from the semiconductor die. In addition, only the solder bumps used for carrying signals are sequentially numbered. In another embodiment of the invention, some of the bond sites may be used for utilities such as ground and power. Such utility bond sites are not numbered. Likewise, utility solder balls are not numbered. The signal bond sites are coupled to vias by signal traces. The vias appear on the other side of the substrate and are coupled to signal solder balls such that the positional order of the corresponding bond sites is mapped to signal solder bumps having the same positional order in the grid-like array. In this way, the sequential linear ordering of the bond sites is preserved when they are mapped to the two-dimensional grid-like array of solder balls.

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Patent Owner(s)

Patent OwnerAddress
ACC MICRO INC10F-2 77 NAKING EAST RD SEC 4 TAIPEI R O C 105

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chu, Edwin Cupertino, CA 4 321
Lai, Hu-Kong San Jose, CA 3 298

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