Synchronous semiconductor memory device
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United States of America Patent
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Jan 13, 1998
Grant Date -
N/A
app pub date -
Feb 18, 1997
filing date -
Nov 22, 1994
priority date (Note) -
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Importance
Abstract
A refresh control circuit of a DLL circuit responds to an auto refresh detection signal AR and a self refresh detection signal SR to inhibit input of clock signals ECLK and RCLK to a phase comparator and to a voltage control delay circuit. The DLL circuit can be stopped in a mode where an internal clock signal is not required to reduce power consumption.
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