Semiconductor device including active matrix circuit

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United States of America Patent

PATENT NO 5712495
SERIAL NO

08807001

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Abstract

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A combination of a doping process and the use of side walls which allows the source and drain of a thin film transistor of an active matrix circuit to be doped with only one of N-type and P-type impurities and which allows the source and drain of a thin film transistor used in a peripheral circuit of the same conductivity type as that of the thin film transistor of the active matrix circuit to include both of N-type and P-type impurities. Also, a thin film transistor in an active matrix circuit has offset regions by using side walls, and another thin film transistor in a peripheral circuit has a lightly doped region by using side walls.

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Patent Owner(s)

Patent OwnerAddress
SEMICONDUCTOR ENERGY LABORATORY CO LTDJAPAN'S KANAGAWA PREFECTURE ATSUGI CITY ATSUGI-SHI KANAGAWA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Suzawa, Hideomi Kanagawa, JP 312 10152

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