Method and apparatus for designing a circuit by analyzing selected artificial hardware dependencies inserted into a dynamic dependency graph
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United States of America Patent
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Jan 27, 1998
Grant Date -
N/A
app pub date -
Oct 31, 1995
filing date -
Oct 31, 1995
priority date (Note) -
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status (Latency Note)
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Abstract
The disclosed method of designing a circuit includes the step of building a dependency graph for a set of computer program instructions. A set of artificial dependencies are inserted into the dependency graph to form a modified dependency graph. The artificial dependencies are hardware limitations such as register renaming limitations, branch prediction limitations, and memory disambiguation limitations. The execution performance of selected artificial dependencies of the modified dependency graph are then analyzed to generate a set of performance values. The top-ranked performance value is associated with a modified dependency graph with a selected set of hardware dependencies. A circuit specification corresponding to the modified dependency graph with the selected set of hardware dependencies is then used to fabricate a circuit.
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