Errors and erasures correcting reed-solomon decoder

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United States of America Patent

PATENT NO 5715262
SERIAL NO

08501284

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A Reed-Solomon decoder and a decoding algorithm executed by the decoder are disclosed. The decoder includes a syndrome computer and a syndrome processor. The syndrome computer is a pipelined functional unit for computing syndromes from a received codeword and storing erasure location members as flagged by an Erasure Flag signal. The syndrome processor includes a pipelined functional unit and a Chien search circuit for receiving from said syndrome computer the computed syndromes, erasure locations, and number of erasures and computing erasure locator polynomial, modified syndrome polynomial, error locator and error evaluator polynomials, error-erasure locator polynomial, and error value at an error location at each error location found by the Chien search circuit.

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Patent Owner(s)

  • AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gupta, Alok Sunnyvale, CA 89 1737

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