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Abstract

A multiprocessor system and method for allocating data into a cachet to minimize the amount of data transaction among the caches for achieving a cache consistency. The system has a plurality of processors, each having a cache. An outside common memory stores data and a bus line is coupled among the respective caches for transferring data among the caches and the common memory for achieving a snooping function among the caches in order to maintain cache consistency. Each processor further includes a memory space allocation controller for controlling a requested data into the cache with a predetermined cache line unit. The memory space allocation controller includes a memory space allocation requestor, a cache line size recognizer and memory space allocator for allocating memory space in accordance with instructions from both the memory space allocation requestor and the cache line size recognizer so as to allocate the requested data within a minimum cache line number.

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First Claim