Process for forming fine pattern for semiconductor device utilizing multiple interlaced exposure masks
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United States of America Patent
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Feb 10, 1998
Grant Date -
N/A
app pub date -
Jun 26, 1997
filing date -
Nov 10, 1993
priority date (Note) -
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Abstract
There are disclosed processes for forming fine patterns on a semiconductor substrate to a lesser degree than the resolving power of a step and repeat used, thereby improving the degree of integration of the semiconductor device. The process comprises the steps of: forming a first light-exposure mask and a second light-exposure mask with interlaced patterns selected from a plurality of fine patterns to be formed on a semiconductor substrate; coating an organic material layer on the semiconductor substrate; patterning the organic material layer by use of the first light-exposure mask, to form organic material layer patterns; forming a photosensitive film over the organic material layer patterns; and patterning the photosensitive film by use of the second light-exposure mask to form photosensitive film patterns, in such a way that each of photosensitive film patterns is interposed between two adjacent organic material layer patterns.
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