Method for cleaning waste matter from the backside of a semiconductor wafer substrate
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United States of America Patent
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Feb 10, 1998
Grant Date -
N/A
app pub date -
May 6, 1996
filing date -
May 6, 1996
priority date (Note) -
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Abstract
A method for manufacturing a semiconductor device on a wafer that has a substrate with a front side and a backside, and an accumulation of waste matter on the backside of the substrate. In a method of the invention, a cover layer is deposited over the front side in a normal coating step of a process for fabricating a component on the wafer. The cover layer provides material used in the process for fabricating the component on the front side of the wafer and creates a barrier over the front side. The waste matter is removed from the backside of the wafer by etching the waste matter from the backside of the wafer with a suitable etchant, or by planarizing the backside of the wafer with a chemical-mechanical planarization ('CMP') process. During the removal step, the cover layer protects the front side and any device features on the front side from being damaged while the waste matter is removed from the backside of the wafer. Since the cover layer is deposited in a normal coating step of the process for fabricating a component on the wafer, it is deposited irrespective of whether the waste matter is removed from the wafer.
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Patent Owner(s)
| Patent Owner | Address | |
|---|---|---|
| U S BANK NATIONAL ASSOCIATION AS COLLATERAL AGENT | 100 WALL STREET SUITE 1600 NEW YORK NY 10005 |
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Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Blalock, Guy | Boise, ID | 61 | 1522 |
| Prall, Kirk | Boise, ID | 104 | 1257 |
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| Fee | Large entity fee | small entity fee | micro entity fee |
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| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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