Method of arranging alignment marks

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United States of America Patent

PATENT NO 5716889
SERIAL NO

08759199

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A shot region includes a device region for forming a semiconductor device therein and a dicing region used for dicing. A portion of the peripheral edge portion of the shot region is defined by a portion of the peripheral edge portion of the device region. An alignment mark is arranged within the device region, and additional alignment marks are arranged within the dicing region. Thus, the number of the devices manufactured per wafer can be increased without degrading precision of alignment.

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Patent Owner(s)

Patent OwnerAddress
RENESAS ELECTRONICS CORPORATION2-24 TOYOSU 3-CHOME KOUTOU-KU TOKYO 135-0061

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Asakura, Mikio Hyogo, JP 105 2061
Tsuji, Takaharu Hyogo, JP 40 1182
Yamasaki, Kyoji Hyogo, JP 31 519

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