Method and apparatus for dynamic conversion of computer instructions
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United States of America Patent
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-
Feb 24, 1998
Grant Date -
N/A
app pub date -
Aug 27, 1996
filing date -
Nov 2, 1993
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An instruction cache design which converts a sequential instruction stream into a compound format in the instruction cache. The conversion from sequential instructions to compound instructions is performed by an instruction stream interpreter unit (ISU), which is placed between the instruction cache and main memory. The conversion process is performed when an instruction cache miss occurs. Each line in the instruction cache contains a single compound instruction. The format of this compound instruction is transparent to programmers and will vary depending on the number of execution units which are to be supported.
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