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Abstract

A method and apparatus for limiting access to a nonvolatile memory device by inserting access limiting circuitry between CPU generated read and write command signals being sent to the nonvolatile memory device and the nonvolatile memory device itself such that write commands can be received and executed by the nonvolatile memory device only when the CPU is in a System Management Mode, and such that read commands for protected addresses can be received and executed by the nonvolatile memory device only when the CPU is in the System Management Mode, but is still able receive and executed read commands for non-protected addresses regardless of the mode of the CPU. This feature can also be provided for the write command. The access limiting circuitry is therefore capable of preventing a virus program, or a malfunctioning operating system, from undesirably altering data in the nonvolatile memory device since the operating system is preempted when the CPU is in the System Management Mode.

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First Claim