Device-under-test card for a burn-in board

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5726482
SERIAL NO

08319906

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A device-under-test card includes a matrix of fuses and/or antifuses formed as part of a multi-layered structure. The matrix of fuses and/or antifuses can be electrically programmed to connect any one of first electrical contacts to any one of second electrical contacts and so allows the device-under-test card to act as a junction between burn-in board traces couplable to signal drivers and/or receivers and burn-in board traces couplable to terminals of a device-under-test. The device-under-test card also includes a discrete resistor or alternatively a resistor ladder that permits a terminal of a device-under-test to be coupled to a power or ground terminal or to any combination of resistances including a short, in addition or as an alternative to any one of various signal drivers and/or receivers.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
PROLINX LABS CORPORATION90 GREAT OAKS BLVD STE 107 SAN JOSE CA 95119

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chiang, Steve S Saratoga, CA 49 1886
Lan, James J D Fremont, CA 13 793
Nathan, Richard J Morgan Hill, CA 25 748
Osann, Jr Robert Los Altos, CA 26 802
Wu, Paul Y F San Jose, CA 9 625

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation