Semiconductor device having a plated heat sink

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United States of America Patent

PATENT NO 5726494
SERIAL NO

08806727

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Abstract

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A semiconductor device having a plated heat sink structure is provided, in which an Au layer (5) high in thermal expansion coefficient is formed on the lower surface of a GaAs substrate (1) having a source electrode (2), a gate electrode (3) and a drain electrode (4) of a field effect transistor on the upper surface, and, a W layer (6) low in thermal expansion coefficient is formed on the lower surface of the Au layer (5). Warping of the device after mounted on a package is reduced on the ground of such a plated heat sink structure.

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Patent Owner(s)

Patent OwnerAddress
RENESAS ELECTRONICS CORPORATIONTOKYO 135-0061

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Nashimoto, Yasunobu Tokyo, JP 13 333
Tsutsui, Hiroaki Tokyo, JP 25 271

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