System decoder circuit with temporary bit storage and method of operation

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United States of America Patent

PATENT NO 5729556
SERIAL NO

08054127

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Abstract

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A data processing system (10) is disclosed which comprises a microprocessor host (12) coupled to a decoding system (14). A host interface block (18) receives a bit stream and passes bit stream on to a system decoder block (20). The system decoder block (20) extracts the appropriate data from the bit stream and loads an input buffer (24) or an optional external buffer (26). An audio decoder block (28) retrieves the data from the input buffer (24) and generates scale factor indices, bit per code word values and subband samples which are stored in an arithmetic unit buffer (30). A hardware filter arithmetic unit block (32) retrieves the information from the arithmetic unit buffer (30) and dequantizes, transforms and filters the data to generate PCM output data which is loaded into a PCM buffer (34). The data within the PCM buffer (34) is output by a PCM output block (36) to a digital-to-analog converter (16).

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Patent Owner(s)

Patent OwnerAddress
TEXAS INSTRUMENTS INCORPORATED12500 TI BOULEVARD MS 3999 DALLAS TX 75243

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Benbassat, Gerard St. Paul de Vence, FR 13 456
Kam, Shiu Wai Richardson, TX 4 123
Laczko, Sr Frank L Allen, TX 27 1140
Li, Stephen H Garland, TX 12 270
Walker, Karen L Richardson, TX 12 416

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