High speed pipeline method and apparatus
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United States of America Patent
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Mar 24, 1998
Grant Date -
N/A
app pub date -
Jan 23, 1995
filing date -
Jan 23, 1995
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A data processing apparatus has a number of data processors connected in a series by data lines so that data signals are processed in a preceding processor and communicated to a succeeding processor in the series. The apparatus has a number of control elements, where a control element has first and second inputs receiving processor status signals and an output sending a signal to enable processing. The control element output assumes a certain output state only if both inputs assume the state. The output, having assumed the state, holds the state, despite one of the inputs not holding the state, only if a certain one of the inputs does hold the state.
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