Method for implementing tri-state nets in a logic emulation system

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO

5734581

SERIAL NO

08769659

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A plurality of electronically reconfigurable gate array (ERCGA) logic chips are interconnected via a reconfigurable interconnect, and electronic representations of large digital networks are converted to take temporary actual operating hardware form on the interconnected chips. The reconfigurable interconnect permits the digital network realized on the interconnected chips to be changed at will, making the system well suited for a variety of purposes including simulation, prototyping, execution and computing. The reconfigurable interconnect may comprise a partial crossbar that is formed of ERCGA chips dedicated to interconnection functions, wherein each such interconnect ERQGA is connected to at least one, but not all of the pins of a plurality of the logic chips. Other reconfigurable interconnect topologies are also detailed.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
QUICKTURN DESIGN SYSTEMS, INC.SAN JOSE, CA10

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Batcheller, Jon A Newberg, OR 10 927
Butts, Michael R Portland, OR 40 2138

Cited Art Landscape

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Patent Citation Ranking

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Patent Info (Count) # Cites Year
 
Other [Check patent profile for assignment information] (1)
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SRC LABS, LLC (4)
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* Cited By Examiner