Five volt tolerant protection circuit
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United States of America Patent
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-
Apr 7, 1998
Grant Date -
N/A
app pub date -
Jan 25, 1996
filing date -
Jan 25, 1996
priority date (Note) -
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status (Latency Note)
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Abstract
A low voltage driver tolerant of high voltage and suitable for driving a processor and a memory device. A first protection NFET is coupled to the drains of a series-coupled PFET and NFET forming the basic driver components. Another protection NFET is connected in series to the first NFET. This second protection NFET requires approximately 1 volt for turn on, such that a resultant 3 volts appear at the output of the complete driver assembly. When the output driver is not enabled and 5 volt inputs are being applied from the memory circuit, the two NFET protection transistors block the 5 volts from reaching the processor output driver.
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