Method and apparatus for verifying stored data

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United States of America Patent

PATENT NO 5737339
SERIAL NO

08573877

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Abstract

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An apparatus for verifying stored data comprises a memory unit, a setting unit, an output unit, and a control unit. The memory unit stores a plurality of addresses and a plurality of data as the stored data so that the data are associated with the addresses respectively. The setting unit sets a plurality of the data to a plurality of the addresses of the memory unit and selects any of the addresses. The output unit outputs general data which is different from the data and verify the contents of the data stored in the memory unit. The control unit reads out the contents of the stored data corresponding to the address selected by the setting unit from the memory unit to the output unit.

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Patent Owner(s)

  • FUJITSU LIMITED

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Goto, Kota Kawasaki, JP 7 23
Koyanagi, Norio Kawasaki, JP 3 28

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