Method of making self-aligned dual gate MOSFET with an ultranarrow channel
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Apr 14, 1998
Issued Date -
N/A
app pub date -
Apr 18, 1996
filing date -
Nov 6, 1995
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A dual gate field effect transistor with an ultra thin channel of substantially uniform width formed by a self-aligned process utilizing selective etching or controlled oxidation between different materials to form a vertical channel extending between source and drain regions, having a thickness in the range from 2.5 nm to 100 nm.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully