US Patent No: 5,740,404

Number of patents in Portfolio can not be more than 2000

Digital signal processor with on-chip select decoder and wait state generator

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Abstract

A digital signal processor (DSP) provides an improvement in the interfacing and sharing of external memory devices. Specifically, the digital signal processor is provided with a parallel interface for communicating with external memory devices, a chip select decoder located on-chip for selectably enabling external memory devices, and a wait status controller for holding processor operation until the selected memory device is ready. The memory architecture is configurable for internal or external wait state generation and memory sharing with other DSPs so that a plurality of varying speed memory devices may be accessed. The chip select decoder includes a programmable register for storing a mode configuration word for defining a plurality of external memory configurations.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
HITACHI AMERICA, LTD.TARRYTOWN, NY181

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Baji, Toru Inagi, JP 41 1392

Cited Art

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Patent Citation Ranking

Forward Cites

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