Insulating gate type field effect transistor

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United States of America Patent

PATENT NO 5744836
SERIAL NO

08808170

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Abstract

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There is provided a semiconductor device including a substrate having a first conductivity, a source region formed at a surface of the substrate, the source region having a second conductivity and including a lightly doped region and a heavily doped region, a drain region formed at a surface of the substrate, the drain region having a second conductivity and including a lightly doped region and a heavily doped region, an insulating film covering the substrate, a first gate electrode formed on the insulating film between the source region and the drain region, a second gate electrode formed on the insulating film above the lightly doped region of the drain region for controlling the number of carriers in the lightly doped region of the drain region, and a third gate electrode formed on the insulating film above the lightly doped region of the source region for controlling the number of carriers in the lightly doped region of the source region. In accordance with the semiconductor device, it is possible to select among a high break down voltage mode and a low resistance mode in a single semiconductor device by applying a certain voltage to the second and third gate electrodes. Thus, the semiconductor device can operate in a high break down mode while turned off in which case a high break down voltage is required, or can operate in a low resistance mode while turned on in which case a low resistance is required.

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Patent Owner(s)

Patent OwnerAddress
NEC CORPORATION7-1 SHIBA 5-CHOME MINATO-KU TOKYO 108-8001

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Takahashi, Kenichiro Tokyo, JP 40 330

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