Method and system for programming a gate array using a compressed configuration bit stream
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United States of America Patent
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Apr 28, 1998
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N/A
app pub date -
Sep 29, 1995
filing date -
Sep 29, 1995
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Abstract
A generalized data decompression engine is incorporated within a field programmable gate array ('FPGA'). The generalized data decompression engine uses a general purpose data decompression technique such as, for example, a Lempel-Ziv type technique. During operation, a compressed configuration bit stream is received by the generalized data decompression engine in the FPGA and is decompressed thereby. A resultant decompressed configuration bit stream is then used to program logic cells within the FPGA.
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