Breadth-first manipulation of binary decision diagrams
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United States of America Patent
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May 5, 1998
Grant Date -
N/A
app pub date -
Oct 28, 1994
filing date -
Oct 28, 1994
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A breadth-first manipulation of reduced, ordered binary decision diagram representation of a logic circuit eliminates page access time bottlenecks encountered when obtaining nodes from secondary memory to primary memory by providing an orderly page access arrangement. The pointer to a node is the address at which the node is located in memory, from which address the memory block at which the node is located is determined. A look-up table is used to convert the memory block information into a variable index indicative of the level at which the node is located. The queue of ITE (if.sub.-- then.sub.-- else) requests is maintained on a per level basis.
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