Importance

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Abstract

A computer system including a plurality of multimedia devices each having a high-speed memory data channel for accessing system memory. Each multimedia device has a high speed link directly to system memory, which is preferably single or multiple ported memory. These individual links are preferably high speed serial interconnects but, alternatively, may be 4-bit, 8-bit, 16-bit, 24-bit, 32-bit, 64-bit or any combination thereof. In this embodiment, intelligent buffering is preferably implemented within the core logic, and arbitration for access to main memory is preferably implemented within the core logic. Each of the multimedia devices uses its dedicated memory data channel to perform data accesses and transfers directly to the main memory, bypassing PCI bus arbitration and PCI bus cycles. Alternatively, each of the multimedia devices includes a high speed memory channel directly to the memory controller in the core logic for accessing system memory. The computer system is thus optimized for real-time applications and provides increased performance over current computer architectures.

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First Claim