Electronic memory addressing device especially for a memory organized into banks

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United States of America Patent

PATENT NO 5749085
SERIAL NO

08492591

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A first and a second input ports, the sum of whose inputs is greater than an integer n, receive pairs of first words of k bits and of second words of n-k bits, each set of n bits representing an address item (ADI) for a point (PO) of a two-dimensional space of points (IM) associated with data coded on 2.sup.d bits, the respective bits of the first and second words representing two coordinates (X, Y) of the point in the said space. A configuration input receives a value of k (k1, k2, k3), chosen to be positive or zero and less than or equal to n, and representative of a geometrical configuration chosen for the two-dimensional?s!?pace! space (IM). Addressing means, which can be controlled through the value of k, select the inputs of the first port receiving the k bits of each first word and the inputs of the second port receiving the n-k bits of each second word, and form, from the selected bits, a cell address word of n bits making it possible to address the memory cell of the memory (MM) in which the datum associated with the said point will be stored.

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Patent Owner(s)

Patent OwnerAddress
FAHRENHEIT THERMOSCOPE LLC2215-B RENAISSANCE DRIVE SUITE 5 LAS VEGAS NV 89119

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Dufal, Frederic Grenoble, FR 4 6
Quillevere, Claude Plougastel-Daoulas, FR 1 3

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