Mask ROM with field shield transistors functioning as memory cells and method of reading data thereof

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United States of America Patent

PATENT NO 5754464
SERIAL NO

08766505

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Abstract

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A mask ROM with increased memory capacity is disclosed. Besides MOS transistors each comprising a memory cell, MOS field shield transistors for device isolation, originally provided for electrically isolating the memory cell transistors, are also used as additional memory cells in addition to providing their isolating function. To write data in one of the field shield transistor, the threshold voltage of the field shield transistor is lowered, compared to field shield transistors in other regions. This is done by ion implantation of an n-type impurity into a p-type silicon substrate in a region beneath a gate electrode of the field shield transistor (a channel region). Data is read by judging on/off of the transistors when an intermediate voltage, between a high threshold voltage and a low threshold voltage is applied to a field shield line.

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Patent Owner(s)

Patent OwnerAddress
NIPPON STEEL SEMICONDUCTOR CORPORATIONTATEYAMA-SHI 1580 YAMAMOTO CHIBA-KEN

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Tomioka, Yugo Tateyama, JP 12 401

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