Compact multiport static random access memory cell
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
May 19, 1998
Grant Date -
N/A
app pub date -
Jun 26, 1996
filing date -
Jun 26, 1996
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A new static random access memory cell for standard logic CMOS processes with three or more metal layers is detailed. The method uses three P-type and three N-type MOS transistors to form a two-port memory cell, which can be configured to perform as a one port, or a two port memory cell. In addition to standard memory applications, specialty memories, like a First-In First-Out (FIFO) buffer, which can benefit from the natural 2-port structure of our invention, are particularly appealing. Additional ports can be added for applications like a 3-port microprocessor register array.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully