Importance

Loading Importance Indicators...

Abstract

An emulation system is constituted with a plurality of FPGAs having on-chip integrated debugging facilities, distributively disposed on a plurality of circuit boards. Each FPGA's on-chip integrated debugging facilities include in particular, a scan register for outputting trace data, and comparison circuitry for generating inputs for a plurality of system triggers. Correspondingly, each board is provided with a plurality of trace memory for recording the trace data, and summing circuitry for generating partial sums for the triggers. The relative memory location within a clock cycle of trace data where the output of a LE will be recorded is predeterminable. Additionally, a system sync memory is provided for storing a plurality of sync patterns to facilitate reconstitution of trace data of a trace session. Lastly, the compilation or mapping software is enhanced to generate a cross-reference file cross referencing each circuit element in a circuit design to the predeterminable relative memory location within a clock cycle of trace data where the trace data for the particular circuit element can be found. Together, these elements allow fully visible tracing to be performed for an emulation.

Loading the Abstract Image...

First Claim