Queue management to serve variable and constant bit rate traffic at multiple quality of service levels in a ATM switch
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United States of America Patent
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May 26, 1998
Grant Date -
N/A
app pub date -
Nov 14, 1995
filing date -
Nov 14, 1995
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A buffer management system and method for use in an ATM switch that allows for data processing of variable bit rate (VBR) and constant bit rate (CBR) traffic using a common buffer memory. The buffer memory is broken down into data sub-queues, each of which is assigned an output and purge priority. ATM cells are allocated to a particular data sub-queue by matching the desired quality-of-service of the cells with the output and purge characteristics of each sub-queue. The system and method dynamically sizes the data sub-queues so as to be equal to the number of ATM cells in the data sub-queue. In addition, age and size ratio thresholds may be assigned to each data sub-queue to better distribute available bandwidth among the sub-queues, and to ensure that cells are not excessively delayed.
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