System and method of establishing error precedence in a computer system

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United States of America Patent

PATENT NO 5758065
SERIAL NO

08565520

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Abstract

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A system and method of establishing error precedence in a computer system which determine a first error to occur. The system determines the order of occurrence of errors in a computer system and includes error precedence modules which record and order errors that occur on a first bus with error that occur on a second bus. Diagnostic processing circuitry reads the errors stored within the error precedence modules and their order of occurrence and determines which bus the first error occurred on.

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Patent Owner(s)

Patent OwnerAddress
TERADATA US INC17095 VIA DEL CAMPO SAN DIEGO CA 92127

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
McDonald, Edward A Lexington, SC 22 1617
Reams, Byron L Lexington, SC 7 194

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