Non-volatile semiconductor memory device

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United States of America Patent

PATENT NO 5761128
SERIAL NO

08827056

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Abstract

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An EPROM has a main memory cell block, test memory cell block and a redundant memory cell block in a memory cell array. The test memory cell block stores a test pattern for a device test after fabrication and a signature code including a maker code and a device code. If some memory cell group in the main memory cell block are substituted for by memory cell group in the redundant memory cell block, the corresponding bit of the signature code is generated by a signature code generator in accordance with the data for the faulty group. The signature code generator selects data read from the redundant memory cell block or the generated bit of the signature code depending on the mode of the memory device.

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Patent Owner(s)

Patent OwnerAddress
NEC CORPORATION108-8001 TOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Watanabe, Kazuo Tokyo, JP 253 2964

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