Method and apparatus for updating host memory in an adapter to minimize host CPU overhead in servicing an interrupt
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United States of America Patent
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Jun 2, 1998
Issued Date -
N/A
app pub date -
Jul 14, 1997
filing date -
Dec 28, 1994
priority date (Note) -
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Abstract
In an asynchronous transfer network (ATM), to prevent the bottleneck associated with a host central processing unit (CPU) trying to receive status information for a plurality of interrupts occurring over an interface input/output (I/O) bus, a method and apparatus which transfers all status information directly to the host memory without host involvement. The host CPU is then notified of this new status information via an interrupt. When status information is transferred to the host memory, consistency is ensured and the number of spurious interrupts are reduced. A host software driver may then read the latest status information from the interface I/O bus at its convenience any not incur any performance penalties of I/O accesses.
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