Importance

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Abstract

A pulse width modulated, digital-to-analog converter (PWM DAC) that includes a pulse generator for generating width modulated pulses in accordance with a digital control value is set forth. The generator includes a clock for generating a clocking signal, a counter responsive to the clocking signal for generating repeating sequences of N-bit counts, each sequence representing a count interval. The PWM DAC further includes a bit rotator for receiving the sequences of N-bit counts and for rotating the bit position of at least a most significant one of N-bits. A latch holds a digital control value, whereby a comparator compares the digital control value with each one of the rotated bit counts to put out the width modulated pulses during the count interval. The rotated bit counts increases the frequency of the comparator, in a substantially linear manner, such that subsequent filtering can be accomplished with minimum time requirements.

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First Claim