Controller for a SIMD/MIMD array having an instruction sequencer utilizing a canned routine library
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United States of America Patent
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Jun 9, 1998
Issued Date -
N/A
app pub date -
Aug 18, 1994
filing date -
Nov 13, 1990
priority date (Note) -
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Abstract
A controller for a SIMD processor array that can execute instructions within each processing element is described. This three stage hierarchical controller executes instructions at the function, routine, and micro-level, to maximize the effectiveness of processing within the array elements themselves. The routine sequencer is hardwired to perform looping and flow control operations using DO/WHILE, IF/THEN/ELSE, and GO-SUB constructs. A pipeline is provided to maintain a steady flow of commands to the array, and means is provided to monitor command execution progress and to provide feedback of progress to the stages of the controller.
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