Microelectronic encapsulation methods and equipment
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United States of America Patent
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Jun 16, 1998
Grant Date -
N/A
app pub date -
Sep 22, 1995
filing date -
Sep 22, 1995
priority date (Note) -
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Abstract
Microelectronic assemblies such as semiconductor chip assemblies are encapsulated. During encapsulation, the terminals carried by a dielectric layer in each assembly, and the bottom surface of the semiconductor chip in each assembly are protected by covering layers. The covering layers confine the liquid encapsulant and prevent contamination of the terminals and chip bottom surfaces. The encapsulation process may be conducted by using a tilting fixture. The liquid encapsulant and the assemblies are placed into the fixture, the fixture is closed and evacuated, and the encapsulant is then poured onto the assemblies while maintaining the fixture under vacuum. The fixture is then pressurized and maintained under pressure during cure of the encapsulant.
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Patent Owner(s)
| Patent Owner | Address | |
|---|---|---|
| TESSERA INC | 3025 ORCHARD PARKWAY SAN JOSE CA 95134 |
International Classification(s)
Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Distefano, Thomas H | Monte Sereno, CA | 191 | 14662 |
| Mitchell, Craig | Coral Springs, FL | 116 | 3503 |
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| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|
| Fee | Large entity fee | small entity fee | micro entity fee |
|---|---|---|---|
| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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